B04: MTJs - Spin-Based Binary Memristors for Non-Volatile Memory and Logic Applications

33 hardware synaptic resource to existing digital computing platforms. Like the transistor, multiple levels of computational abstraction can be defined on top of kT-RAM’s synaptic primitive. To explore these levels of abstraction we have created the KnowmAPI, collection of Java code modules built on top of a kT-RAM emulator with interchangeable cores. In this talk Alex will present a series of useful computational abstraction layers from low level synaptic hardware primitives to compositional (deep) supervised and unsupervised machine learning functions. [1] Malenka, Robert C., and Mark F. Bear. "LTP and LTD: an embarrassment of riches." Neuron 44.1 (2004): 5-21. [2] Citri, Ami, and Robert C. Malenka. "Synaptic plasticity: multiple forms, functions, and mechanisms." Neuropsychopharmacology 33.1 (2008): 18-41. [3] Nugent, Michael Alexander, and Timothy Wesley Molter. "AHaH Computing–From Metastable Switches to Attractors to Machine Learning." PloS one 9.2 (2014): e85175. [4] M. A. Nugent and T. W. Molter. Thermodynamic-ram technology stack, International Journal of Parallel, Emergent and Distributed Systems, 2017, 1-14. B04: MTJs Spin-Based Binary Memristors for Non-Volatile Memory and Logic Applications Viktor Sverdlov, Hiwa Mahmoudi, Thomas Windbacher, Alexander Makarov, Josef Weinbub, and Siegfried Selberherr Institute for Microelectronics, TU Wien, Gußhausstraße 27-29, 1040 Wien, Austria Institute of Electrodynamics, Microwave and Circuit Engineering, TU Wien, Gußhausstraße 25, 1040 Wien, Austria Christian Doppler Laboratory for High Performance TCAD at the Institute for Microelectronics, TU Wien, Gußhausstraße 27-29, 1040 Wien, Austria Email: [email protected], web site: http://www.iue.tuwien.ac.at The use of memristive devices for new computational architectures enables the application of the same device as memory (latches) and logic (gates) [1]. Due to this unique combination of logic and memory within each element these architectures are called stateful [1]. The stateful logic is hence conceptually different from a conventional logic-in-memory architecture [2], where constituting elements are still clearly divided in logic and memory by their functionalities. Therefore, the memristive-based architectures, promising significant enhancements over existing computational resources, open at the same time new computational paradigms leading to increased energy efficient computations and reduced costs. The realization of a material implication (IMP) gate based on two TiO2 memristive switches and a conventional resistor [1] stimulated further development of memristive circuits by establishing a general methodology suitable for the design of integrated circuits based on a memristor-based crossbar architecture with a particular focus on an IMP-based eight-bit full